1. Field of the Invention
The present invention relates to a computer system and a power management method for a computer system, and in particular, a computer system which requires a battery operation such as a portable information terminal and its power management method for the purpose of power saving.
2. Description of the Background Art
In general, in a computer system, a memory device called main memory is utilized as means for storing a currently executed program and data to be directly read or written by that program. This memory device is usually formed by utilizing volatile semiconductor memory elements in which the stored content is lost when the power is turned off.
In a conventional computer system, all the semiconductor memory elements which constitute the main memory are connected to the same power supply so that, once the power of the computer system is turned on, the power is continually supplied to all the semiconductor memory elements until the power of the computer system is turned off.
The power management method for such a main memory device is not so important as long as the power consumed by the main memory device is sufficiently small compared with the power consumed by the entire computer system. However, in a portable information terminal using a battery operation such as PDA (Personal Digital Assistance) or notebook type PC that has become popular in recent years, the structural elements of the computer system are made to be progressively less power consuming as a result of measures such as a use of a flash memory instead of a magnetic disk as a secondary memory device, and a use of a liquid crystal display instead of a CRT as a display device, so that the power consumption by the main memory device is becoming unignorable.
In order to reduce the power consumption by the main memory device, it is possible to adopt a scheme to reduce the power required for maintaining the stored content by using memory elements such as SRAMs instead of usually used DRAMs, but the memory elements such as SRAMs are very expensive compared with DRAMs and have only limited capacities so that it is often quite inappropriate to use such memory elements as a replacement for DRAMs. Consequently, there is a demand for a scheme to reduce the power consumption of the main memory device without abandoning the use of the usually used memory elements such as DRAMs.
As a possible solution to this demand, there has been a proposition as disclosed in Japanese Patent Application Laid Open No. 2-222048 (1990). In this proposition, a DRAM element to which data are to be actually written among a plurality of DRAM elements constituting a memory card is detected by means of hardware, and the power is supplied only to the detected DRAM element while the power supply to the other DRAM elements is interrupted.
However, in this proposition of Japanese Patent Application Laid Open No. 2-222048 (1990), once the data write is made for a particular DRAM element, the power will be continually supplied to this particular DRAM element subsequently, even after its data content is no longer utilized as valid one.
In general, when an execution of a program in the computer system is considered, there can be a case in which the valid data that have been stored up until now will be invalidated as a result of a termination of the program execution, for example. In such a case, it is difficult to judge whether each data on the main memory is a valid one or an invalid one by means of hardware.
Consequently, in order to control the power supply to the main memory device efficiently, there is a need for a control by a software which is responsible for the memory management as well.
In addition, for a case in which a user depresses a wait switch (a suspend button) on the computer system, or a case in which a user does not operate the computer system for a prescribed period of time, it is also preferable to reduce the power consumption further by limiting a number of power supply target memory elements.